PIC16F74T-E/L【PDF 60/104 页】IC MCU FLASH 4KX14 A/D 44PLCC

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Sheet目录3890

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Micrel, Inc.

KSZ8851-16MLLJ

March 2010

M9999-030210-1.0

Wakeup Frame 0 CRC1 Register (0x32 – 0x33): WF0CRC1

This register contains the expected CRC values of the Wake up frame 0 pattern.

The value of the CRC calculated is based on the IEEE 802.3 Ethernet standard; it is taken over the bytes specified in

the wake up byte mask registers.

Bit

Default Value

R/W

Description

15-0

0x0000

WF0CRC1

Wake up Frame 0 CRC (upper 16 bits).

The expected CRC value of a Wake up frame 0 pattern.

Wakeup Frame 0 Byte Mask 0 Register (0x34 – 0x35): WF0BM0

This register contains the first 16 bytes mask values of the Wake up frame 0 pattern. Setting bit 0 selects the first byte

of the Wake up frame 0, setting bit 15 selects the 16th byte of the Wake up frame 0.

Bit

Default Value

R/W

Description

15-0

0x0000

WF0BM0

Wake up Frame 0 Byte Mask 0

The first 16 bytes mask of a Wake up frame 0 pattern.

Wakeup Frame 0 Byte Mask 1 Register (0x36 – 0x37): WF0BM1

This register contains the next 16 bytes mask values of the Wake up frame 0 pattern. Setting bit 0 selects the 17th byte

of the Wake up frame 0. Setting bit 15 selects the 32nd byte of the Wake up frame 0.

Bit

Default Value

R/W

Description

15-0

0x0000

WF0BM1

Wake up Frame 0 Byte Mask 1.

The next 16 bytes mask covering bytes 17 to 32 of a Wake up frame 0 pattern.

Wakeup Frame 0 Byte Mask 2 Register (0x38 – 0x39): WF0BM2

This register contains the next 16 bytes mask values of the Wake up frame 0 pattern. Setting bit 0 selects the 33rd byte

of the Wake up frame 0. Setting bit 15 selects the 48th byte of the Wake up frame 0.

Bit

Default Value

R/W

Description

15-0

0x0000

WF0BM2

Wake-up Frame 0 Byte Mask 2.

The next 16 bytes mask covering bytes 33 to 48 of a Wake-up frame 0 pattern.

Wakeup Frame 0 Byte Mask 3 Register (0x3A – 0x3B): WF0BM3

This register contains the last 16 bytes mask values of the Wake up frame 0 pattern. Setting bit 0 selects the 49th byte

of the Wake up frame 0. Setting bit 15 selects the 64th byte of the Wake up frame 0.

Bit

Default Value

R/W

Description

15-0

0x0000

WF0BM3

Wake-up Frame 0 Byte Mask 3.

The last 16 bytes mask covering bytes 49 to 64 of a Wake-up frame 0 pattern.

0x3C – 0x3F: Reserved

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